BERKELEY, Calif.--It's not easy to get hardware designers and software developers in sync when it comes to developing a new computer architecture, according to Dave Patterson, one of the pioneers of the original RISC architecture.
The hardware takes years to develop, and work on affiliated software doesn't start in earnest until the hardware is done. Simulators exist, but the software developers really don't take advantage of them like they should, Patterson said. That causes the development cycle to drag out even longer.
Enter RAMP, or Research Accelerator for Multiple Processors. The idea behind the program is to build a laboratory computer out of field programmable gate arrays, reprogrammable chips that can be reconfigured to act as different chips. (As one Intel researcher has described it, the FPGA is the utility infielder of the semiconductor world.) Ideally, an FPGA-based RAMP computer could be assembled cheaply and easily.
"If you can put 25 CPUs in one FPGA, you can put 1,000 CPUs in 40 FPGAs," Patterson said during a symposium here this week at UC Berkeley, where he is a professor of electrical engineering. Such a computer would cost about $100,000, he estimated. It would also take up relatively little space--about one-third of a rack--and consume only about 1.5 kilowatts of power.
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